The present invention is directed to the control of mass storage devices and, more particularly, to an enhanced ATA channel protocol which supports enhanced device connectivity and functionality.
The ATA channel has traditionally been implemented as a set of registers, addressed by a simple decode of a host computer""s internal bus. As shown in the exemplary embodiment of FIG. 1, a standard ATA channel configuration includes a host or ATA adapter 10 coupled between a host bus 12 and an ATA bus 14 (implemented as an ATA cable) to which up to two peripheral devices 16 and 18 might be connected. Originally, host or ATA adapters allowed many of the original ISA signals to be passed onto the ATA cable along with decoded peripheral device address lines. At best, only a few of the original ISA signals were buffered.
The address registers that were being addressed resided within the peripheral devices. Accordingly, the channel consisted of the ATA bus which defined the electrical characteristics and a timing protocol, and an API (Applications Programming Interface) which defined registers and commands. Because the ATA bus was a simple decode of the ISA bus, the protocols and timings were necessarily those of the ISA bus.
As time progressed, there has developed a need to increase performance and functionality of the ATA bus; thus the timings and protocols have changed. Because these protocols no longer reflect those of the host bus, the ATA adapter has become more sophisticated and now represents a bridge between the host bus and the ATA bus. Functioning as a bridge, the ATA adapter must convert between the electrical interfaces as well as convert between signal protocols.
However, there is an additional need to provide more functionality to the channel, particularly functionality beyond that of mere performance and protocol conversion.
One of the main elements of the success of the ATA Standard has been the effort made to ensure compatibility. This compatibility has been extended across physical connectivity, electrical characteristics and most importantly, in the API. Utilizing a standard API has meant that host software investments have been protected and that any software written for any legacy-type devices will also work on more modern devices.
The ATA API consists of a set of 8-bit registers that have been modeled on the original WD1002 disk controller adapter. In the X86-PC world the I/O address of these registers have become a defacto standard. These registers are used for both commands and the transfer of PIO data. This compatibility has been rigorously maintained to the present day, even in the case of PCI adapters. The need for enhanced performance has necessitated the use of DMA protocols and adapters. There has evolved a defacto standard for the registers used to control PCI Bus Mastering Adapters, but no standard has been developed for their configuration. Unfortunately, the current generation PCI adapter API does not allow for variable length data transfer while the ATA protocol does.
Accordingly, there exists a need for an expanded ATA channel which incorporates the functionality of the present ATA channel but also incorporates enhanced functionality.
The enhanced ATA channel functions, in accordance with the invention, provide a number of non device-specific features such as extending the number of devices on a channel, automatic polling of queued devices and the ability to hot swap devices. These functions are controlled by a set of channel commands that are interpreted by the channel and which are not passed on to any connected peripheral device. Any unrecognized command reaching the device will cause it to create an interrupt and write to its status register.
In accordance with the invention, it is desirable to isolate peripheral devices from-the channel during implementation of channel commands. This can be accomplished in a number of ways. However, some methods will result in signal timings being extended. For those methods that do cause signal timing delays, the Reflective Timing Principles of the HotPort(trademark) External Device are used.